1. Field of the Invention
The present invention relates generally to methods used for testing the timing parameters of a system design, and more specifically to a method of utilizing a Timing Shell Generator Program to monitor timing violations between the modules of a design during an event driven simulation.
2. Brief Description of the Prior Art
With the complexity of modern circuits and system designs, it is often impossible or impractical to check for timing violations between the various blocks of a hardware design with an acceptable degree of accuracy. There are often several thousand individual gates incorporated into a design, all of which must interact within predetermined time periods to facilitate the precision necessary to accommodate a functional circuit or system. This often presents formidable design problems which require an inordinate amount of applications support.